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In this talk we’re going to discuss how various hardware-assisted performance and power monitoring methods and a statistical call graph model help reveal the execution logic of a program, show the impact of the OS scheduler, the efficiency of thread synchronization schemes employed by the programmer, and the energy consumption of each performance-critical function or control flow path. The goal of this talk is to describe the advantages of this joint analysis methodology in the example of a performance monitoring instrument that implements those methods, show how it helps in optimizing real code, update the audience on latest developments in both software and hardware performance analysis methods, and receive feedback on desired improvements.

Author: Stanislav Bratanov

Staff research engineer, Intel

Stanislav Bratanov

Designs and develops hardware-assisted software performance monitoring systems for parallel computers, also conducts research in the area of operating systems and parallel programming environments, experienced in development and optimization of parallel video and audio coding systems; author of 9 patents and several articles on computer and law science.